1. Field of the Invention
The present invention relates to a signal processing unit that performs frame synchronization and other signal processing on a received signal after reducing the signal speed to a manageable speed for complex signal processing by converting the received signal into parallel signals on the necessary number of signal lines, the signal processing unit being incorporated in a transmission apparatus used in a transmission system for which a frame structure providing a transmission capacity N times that of a base-level frame is defined in a form such that N base-level frames are interleaved, as specified by SONET (Synchronous Optical Network) and SDH (Synchronous Digital Hierarchy).
2. Description of the Related Art
The aforementioned transmission apparatus can have a different capacity, in terms of the amount of information it can handle, according to the purpose of the information transmission. In the case of SONET, for example, a commercially available transmission apparatus can have one of several capacities starting with Synchronous Transport Signal Level 1 (STS-1 signal) (51.84-Mb/s bit rate) and extending to STS-3 and STS-12, and today, STS-48 (2.4-Gb/s bit rate). In the future, the need for the transmission of every possible kinds of information, including video, is expected to increase, demanding a corresponding increase in the transmission capacity of the transmission apparatus, and work is now underway to develop transmission apparatus capable of STS-192 (10-Gb/s bit rate). Here, STS-N (N is 3, 12, 48, and 192) has a frame structure defined in a form such that N base-level STS-1s are byte-interleaved.
In a transmission apparatus handling such high-speed signals, signal processing, including frame synchronization, is performed on a received optical signal after reducing the signal speed to a manageable speed (for example, 78 MHz, and more precisely 77.76 MHz) for complex signal processing by first converting the received optical signal into an electrical signal and then serial-parallel converting it into parallel signals on the necessary number of signal lines. For example, in the case of an STS-3 signal, the signal is converted into 78 MHz.times.2 parallel signals; likewise, the received signal is converted into 78 MHz.times.8 parallel signals in the case of an STS-12 signal, and into 78 MHz.times.32 parallel signals in the case of an STS-48 signal. The parallel signals are then input to an LSI for frame synchronization and other signal processing.
Traditionally, a transmission apparatus was limited to, for example, either STS-3 or STS-12, and the gate size of a signal processing LSI was not as large as that of present ones; as a result, there was no need to process signals at different bit rates using the same LSI, and the design of a transmission apparatus was based on single bit rate. However, with an increase in an information transmission rate, the problem has arisen that with the present signal processing unit capable of handling only a single bit rate, the unit has to be replaced as the amount of information increases, and an LSI has to be developed to handle the increased bit rate. This is quite uneconomical in view of the time and cost required to develop one LSI.
One solution would be to simply provide two different signal processing circuits to handle signals of different bit rates, but this would increase the LSI gate size unnecessarily, resulting in an enormously inefficient system (in terms of power consumption, cost, etc.).